Si nanowire Technology

摘要

Recently, CMOS downsizing has been accelerated very aggressively in both production and research levels. However, it is still questionable if we can successfully introduce deep sub-10 nm CMOS LSIs into market, due to performance concerns - such as I_(on)/I_(off) ratio, current drive, variation in the electrical characteristics, concerns for the yield, reliability and manufacturing cost. We have conducted nano-CMOS studies in advance to provide possible solutions to the future expected problems. Si Nanowire FETs have been found to have very promising characteristics with high I_(on)/I_(off) ratio and high drive current which could give them a strong foothold in the near future device structures.