A Low-Power Passive Mixer Receiver for Software Defined Radio (SDR) Applications

摘要

Software Defined Radio (SDR) is a promising concept for the next generation of low-power portable wireless devices. Different communication standards can be processed just by changing the software in the transmitter. This approach allows great flexibility as well as hardware cost reduction. In this paper, we describe discrete-time passive mixer architecture for Radio Frequency (RF) direct sampling receivers. This architecture can achieve wideband quadrature demodulation and is suitable for SDR applications. The performances of the architecture are evaluated by simulation. Currently, we are working on the design of an Integrated Circuit (IC) that will implement a quadrature sampled I/Q receiver front-end. The IC is based on a 130nm CMOS technology. The receiver should be able to work in the 868MHz and 2.4GHz ISM bands. The expected power consumption is less than 2 mW.