A Simple Framework for Energy Efficiency Evaluation and Hardware Parameter Tuning with Modular Support for Different HPC Platforms

摘要

High Performance Computing (HPC) faces the problem of the potentially excessive energy consumption requirements of the upcoming exascal machines. One of the proposed approaches to reduce energy consumption coming from the software side is dynamic tuning of hardware parameters during the application runtime. In this paper, we tune CPU core and uncore frequencies using Dynamic Voltage and Frequency Scaling (DVFS), and number of active CPU cores by means of QpenMP threads. For our research it is also essential that the HPC cluster contains infrastructure that provides energy consumption measurements. In this paper, we evaluate the energy consumption of an ARM-based platform with lower performance and even lower energy consumption, and two traditional HPC architectures based on x86 CPU architecture - Intel Xeon E5-26xx v3 (codename Haswell) and Intel Xeon Phi (codename KNL). To improve the efficiency and quality of such research we have developed a MERIC library. It enables both resource (time, energy, performance counters) usage monitoring and dynamic tuning of any HPC application that is properly instrumented. This library is designed to contribute minimal overhead to application runtime, and is suitable for analysis and tuning of both simple kernels and complex applications. This paper presents an extension of the library to support new architectures, (i) the low power ARMv8 based Jetson TX1 and (ii) the HPC centric Intel Xeon Phi (KNL) many-core CPU. The evaluation is carried out using a Lattice Boltzmann based benchmark, which shows energy savings on all presented platforms, in particular 20% on Haswell processors.