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Micro-architectural optimization of a coarse-grained array based baseband processor

机译:基于粗粒阵列基带处理器的微架构优化

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Software Defined Radios (SDR) has been introduced as the ultimate way to achieve the flexibility that is needed to cope with the many emerging wireless standards. A key challenge in the implementation of such radios for mobile terminals is meeting the performance and energy requirements. A suitable architecture template is the first requirement, but finding the optimal instance is as important. This paper shows that it is possible to half the power consumption of an already very energy efficient baseband processor by doing micro-architectural improvements. Overall a 2.6× improvement in energy efficiency and a 2.0× improvement in power consumption has been achieved, resulting in an average power consumption for the baseband processing of 108mW.
机译:软件定义的无线电(SDR)已被引入为实现应对许多新兴无线标准所需的灵活性的最终方法。用于移动终端的这种无线电的实施中的一个关键挑战正在满足性能和能量需求。合适的体系结构模板是第一个要求,但查找最佳实例同样重要。本文表明,通过进行微观架构改进,可以对已经非常节能的基带处理器的功耗的一半。总体上实现了2.6倍的能效和功耗的提高2.0倍,导致了108MW的基带处理的平均功耗。

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