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Research and Implement of Serial RapidIO based on Mul-DSP

机译:基于MUL-DSP的串行RAPIDIO的研究与实施

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In order to solve an intra-system interface for chip-to-chip and board-to-hoard communications and meet the explosive demand for higher bandwidth and more efficient signal processing and data transmission in typical enbeded system, there is an active demand that adopting a new system interconnect technology to ensure that bus performance continues to increase. The RapidIO is proposed in the paper. Up to 10Gb/s of bandwith, low latency and low power meet the demand on the performance of rapid developing communication technologies. The paper introduces the basic principle, inner architechture and the key technique of the RapidIO, research its application and based on DSP TMS320C6455. It shows the design of RapidIO transmission between different DSP. The paper gives the flow of the software design. The experiment results show that the read and write operation can stably work at 3.125Gb/s per channel between different DSP. The rate is up to 275MB/s when the baud rate is 3.125 Gbps.
机译:为了解决芯片到芯片和囤积通信的系统内接口,并满足典型抵消系统中具有更高带宽和更有效的信号处理和数据传输的爆炸性需求,具有采用的主动需求一种新的系统互连技术,以确保总线性能继续增加。在论文中提出了Rapidio。高达10GB / s的带宽,低延迟和低功率符合快速开发通信技术性能的需求。本文介绍了Rapidio的基本原理,内部原则和关键技术,研究其应用并基于DSP TMS320C6455。它显示了不同DSP之间的Rapidio传输的设计。本文提供了软件设计的流程。实验结果表明,读写操作可以在不同DSP之间稳定地在3.125GB / s下工作。当波特率为3.125 Gbps时,速率高达275MB / s。

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