Scalability of MSD memory effect

摘要

The scaling requirements of bulk DRAMs have lead to various concepts of capacitor-less single-transistor (IT) DRAM. Amongst them, the MSDRAM, a double-gate Fully Depleted SOI transistor, exhibits attractive performance resulting from the MSD hysteresis effect. Systematic measurements are presented showing the impact of transistor parameters on the MSD effect. It is found that MSD is maintained for small dimensions even in standard SOI MOSFETs without specific optimization.