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A novel fast method for computation of zernike moments based on FPGA

机译:一种基于FPGA的Zernike矩形的新型快速方法

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This paper presents a novel approach to the fast computation of Zernike moments from a digital image. Most existing fast methods for computing Zernike moments have focused on the reduction of the computational complexity of the Zernike 1-D radial polynomials by introducing their recurrence relations. Instead, in our proposed method, we focus on the reduction fo the cumulative number of the Zernike moments with many PEs (process elements) which are achieved by VHDL(VHSIC Hardware Description Language). The architecture described above was simulated and implemented targeting Xilinx GA(gate array). In the experiments, results show the accuracy of the form for computing discrete Zernike moments and confirm that the proposed method for the fast computation of Zernike moments is much more efficient than existing fast methods in most cases.
机译:本文提出了一种新颖的数字图像快速计算Zernike矩的方法。用于计算Zernike矩的最现有的快速方法专注于通过引入其复发关系来降低Zernike 1-D径向多项式的计算复杂性。相反,在我们提出的方法中,我们专注于通过VHDL(VHSIC硬件描述语言)实现的许多PES(过程元素)的Zernike矩的累积数量的减少。上述架构是模拟和实现靶向Xilinx Ga(门阵列)的架构。在实验中,结果显示了用于计算离散Zernike矩的形式的准确性,并确认在大多数情况下,Zernike时刻的快速计算的方法比现有的快速方法更有效。

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