On-chip sine wave frequency multiplier for 40-GHz signal generator

摘要

This paper presents a novel signal frequency multiplier for very high speed applications. The proposed circuit is based on a simple but effective folding cell and it is able to generate an output at four times the frequency of the differential sine wave input. The circuit has been designed and optimized for a 40-nm CMOS technology and it has been fully simulated at the transistor level. Possible fabrication and timing mismatches are corrected with foreground calibration. Simulation results shows that the multiplier can provide an output signal at 40 GHz starting from a 10-GHz input signal consuming about 5 mW.