首页> 外文会议>Materials Research Society Symposium on Amorphous and Polycrystalline Thin-Film Silicon Science and Technology >Self-Aligned Thin Film Transistor Fabrication with an Ultra Low Temperature Polycrystalline Silicon Process on a Benzocyclobutene Planarized Stainless Steel Foil Substrate
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Self-Aligned Thin Film Transistor Fabrication with an Ultra Low Temperature Polycrystalline Silicon Process on a Benzocyclobutene Planarized Stainless Steel Foil Substrate

机译:具有超低温多晶硅工艺在苯并丁烯平坦的不锈钢箔基材上的自对准薄膜晶体管制造

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Self-aligned p-channel thin film transistors (TFTs) were fabricated with an ultra low temperature polycrystalline silicon (poly-Si) process on benzocyclobutene planarized stainless steel foil substrates (SSFs). We have demonstrated a successful crystallization of large grain poly-Si films with sequential lateral solidification (SLS) method. The TFT performances were enhanced and stabilized by plasma oxidation of the polycrystalline Si surface prior to Al{sub}2O{sub}3 gate dielectric film, which was deposited by a plasma enhanced atomic layer deposition (PEALD) method. The fabricated TFT showed a field effect mobility of 95cm{sup}2/Vs, a threshold voltage of -3V and a sub-threshold swing of 0.45V/dec.
机译:用超低温度多晶硅(Poly-Si)在苯并环丁烯平坦的不锈钢箔基底(SSF)上用超低温度多晶硅(Poly-Si)工艺制造自对准的P沟道薄膜晶体管(TFT)。我们已经证明了具有顺序横向凝固(SLS)方法的大谷物多Si薄膜的成功结晶。通过在Al {Sub} 2O} 3栅极介电膜之前通过血浆Si表面的血浆氧化来增强和稳定,通过等离子体增强原子层沉积(PEALD)方法沉积。制造的TFT显示出95cm {sup} 2 / vs,阈值电压的场效期迁移率,阈值电压和0.45V / DEC的子阈值摆动。

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