RFIC Design Methodology: Functional Verification

摘要

Full-chip Functional Verification for RF-A/MS (analog mixed-signal) applications is not only new as a "design methodology process" to some design organizations; but, is fast becoming a "must have" verification as a final tape-out simulation sign-off. Today''s wireless industry, due to tight schedule demands and short product life-cycles, requires that a RFIC development group deliver "1st Pass Functional silicon." Then, when functional RFIC silicon is produced, minor design changes (minimal mask-layer changes) needed to meet performance specifications can be accommodated within a wireless product schedule.