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Slicing Concurrent Real-Time System Specifications for Verification

机译:切片并发实时系统规范进行验证

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The high-level specification language CSP-OZ-DC has been shown to be well-suited for modelling and analysing industrially relevant concurrent real-time systems. It allows us to model each of the most important functional aspects such as control flow, data, and real-time requirements in adequate notations, maintaining a common semantic foundation for subsequent verification. Slicing on the other hand has become an established technique to complement the fight against state space explosion during verification which inherently accompanies increasing system complexity. In this paper, we exploit the special structure of CSP-OZ-DC specifications by extending the dependence graph - which usually serves as a basis for slicing - with several new types of dependencies, including timing dependencies derived from the specification's DC part. Based on this we show how to compute a specification slice and prove correctness of our approach.
机译:高级规范语言CSP-OZ-DC已被证明非常适合建模和分析工业相关的并行实时系统。它允许我们在适当的符号中模拟诸如控制流,数据和实时要求的每个最重要的功能方面,维护常见的语义基础进行后续验证。另一方面,切片已成为在验证期间补充反对国家空间爆炸的斗争的建立技术,其本身伴随着增加了系统复杂性。在本文中,我们通过扩展依赖图来利用CSP-OZ-DC规范的特殊结构 - 这通常是切片的基础 - 具有几种新类型的依赖项,包括从规范的DC部分导出的时序依赖性。基于此,我们展示了如何计算规范切片并证明我们方法的正确性。

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