Call for an Industry Standard for Pattern Transfer Models for Usage in OPC and Design for Manufacturability

摘要

Lately, "Design for Manufacturability" (DFM) can be found in almost any self-respecting EDA vendor's top-five list of most critical and urgent strategic topics. While the envisioned DFM activities cover a broad spectrum of topics, the exact definition of DFM continues to evade capture. However, it appears self-evident that an important portion of DFM hinges upon the availability of models accurately describing the pattern transfer from the layout to the wafer, here called "pattern transfer models" (PTMs). In combination with a suitable design environment, PTMs will allow physical designers to optimize their layout, thus ensuring the structural integrity over the process window upon transfer to the wafer. In this paper, we argue that PTMs have an importance comparable to that of the "electrical device models" (EDMs) widely used for circuit simulation. We point out some striking analogies between PTMs and EDMs, as far as the basic concepts and use models are concerned. Furthermore, we highlight the significant differences in the EDA landscapes for both model types, most importantly the fact that an industry standard only exists for EDMs. Based on the consequences for EDA vendors and users, as well as manufacturing cooperations that derive from this situation, we formulate the call for an industry standard for PTMs for usage in "Optical Proximity Correction" (OPC) and DFM.