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Scaling VCSEL performance for 100Terabits/s Systems

机译:缩放100terAbits系统的VCSEL性能

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We evaluate VCSEL interconnects for next-generation High Productivity Computers in which hundreds of terabits of bandwidth are envisioned. We present results for VCSEL based links operating PAM-4 signaling using a commercial 0.13 μm CMOS technology. We perform a complete link analysis of the Bit Error Rate, Q factor, random and deterministic jitter by measuring waterfall curves versus margins in time and amplitude. We demonstrate that VCSEL based PAM -4 can match or even improve performance over binary signaling under conditions of bandwidth limited 100meter multi-mode optical link at 5Gbps. We present the first sensitivity measurements for optical PAM-4 and compare it with binary signaling. An empirical relationship for VCSEL scaling versus bit rate and aperture is presented in order to explore reliability of VCSEL-based links. Reliability is found to degrade with aperture with a fourth order power law dependence.
机译:我们评估VCSEL互连的下一代高生产率计算机,其中设想了数百个带宽。我们使用商业0.13μmCMOS技术呈现VCSEL基于VCSEL的链路的结果。我们通过测量瀑布曲线与时间和幅度的边缘来执行误码率,Q因子,随机和确定性抖动的完整链接分析。我们展示了基于VCSEL的PAM -4可以在带宽限量100米多模式光链路条件下匹配或甚至在5Gbps的带宽限制100米多模式光链路条件下通过二进制信令进行性能。我们介绍了光学PAM-4的第一个灵敏度测量,并将其与二进制信令进行比较。提出了对VCSEL缩放与比特率和光圈的经验关系,以探讨基于VCSEL的链路的可靠性。发现可靠性与孔径降低,具有第四阶电力法依赖性。

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