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A Space-Time Multiplex Architecture for 3D Stacked Embedded Vision Systems

机译:用于3D堆叠嵌入式视觉系统的时空复用架构

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Due to the increasing needs of always faster automation technology in the field of industrial fabrication the common methods of machine vision meet their limits. The reasons are the widely used serial computation and transmission of data streams on the base of strict spatially separated data capturing by an image sensor and data processing, e.g. by a coupled DSP. To meet serious real time requirements many discrete high speed components are used which often causes high costs. In contrast we propose a 3D architecture based on stacked chip dies. In order to find a trade-off between speed and required chip area we present a space-time multiplex architecture, i.e. clusters of pixels are processed time-serially by one processor and several clusters are processed by a multi-core processor. Our architecture allows the successive computation of basic low-level image processing operations. We determined an optimal number of serially processed pixels between 16 and 32 in a cluster for a resolution of 256x256 pixels. Furthermore we found out that the most efficient way is to process a line based cluster.
机译:由于在工业制造领域始终更快的自动化技术需求越来越较快,机器视觉的常用方法符合其限制。通过图像传感器和数据处理捕获的严格空间分离数据基础上的数据流的广泛使用串行计算和传输。通过耦合的DSP。为了满足严重的实时要求,使用许多离散的高速分量,这通常会导致高成本。相比之下,我们提出了一种基于堆叠芯片模具的3D架构。为了在速度和所需的芯片区域之间找到权衡,我们呈现了一个空间 - 时间多路复用架构,即像素簇被一个处理器串行处理,并且多核处理器处理了几个集群。我们的体系结构允许连续计算基本的低级图像处理操作。我们在群集中确定了16和32之间的最佳数量,用于分辨率为256x256像素。此外,我们发现最有效的方法是处理基于线的群集。

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