This paper presents the design and implementation of an embedded system for real-time network flow identification. The system identifies data flows based on packet inspection. The main advantage of this system is that it reduces significantly the processing time required for the flow identification. For the hardware implementation, a Xilinx Virtex-II Pro FPGA device and the Xilinx Embedded Development Kit (EDK) software are used. This embedded system represents the first step for designing a reconfigurable router with QoS (Quality of Service) support.
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机译:本文介绍了用于实时网络流识别的嵌入式系统的设计和实现。系统识别基于数据包检查的数据流。该系统的主要优点是它显着降低了流识别所需的处理时间。对于硬件实现,使用Xilinx Virtex-II Pro FPGA设备和Xilinx嵌入式开发套件(EDK)软件。此嵌入式系统表示具有QoS(服务质量)支持的可重新配置路由器的第一步。
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