Multimedia stream standards evolve rapidly as stream applications prosper in embedded systems. A key component of standards, discrete cosine transform is being replaced by SA-DCT, whose complexity results in a large design space. The paper describes a UML 2.0 based design approach to quick evaluation of SA-DCT implementations containing both hardware and software, which are hard to describe and verify in C, Verilog and VHDL. Using the approach, we manage to study the partitioning, reconfigurability as well as performance and hardware cost. The design specifications in UML can be translated into SystemC models consisting of simulators and synthesizable code under proper style constraints. The paper demonstrates the feasibility of quick specifications, verification, evaluation and generation of embedded system designs.
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