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Structured LDPC Codes with Reversed MTR/ECC for Magnetic Recording Channels

机译:具有逆转MTR / ECC的结构化LDPC代码,用于磁记录通道

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Structured low-density parity-check (LDPC) codes have been studied as practical LDPC codes for magnetic recording channels. These codes, such as array codes [1] and eIRA codes [2], enable to construct matrices logically. Their performances, however, are not sufficient for inter-symbol-interference (ISI) channels, especially when the block length becomes short and the code rate becomes high. This is due to the structure of the array codes, which are constructed by single cyclic shift matrices. When multiple-bit errors occur in the channel, they are easily connected through the parity check matrix having many single cyclic shifts, and cause performance degradation as if the matrix had four cycles. In this paper, we propose a system using a random interleaved array LDPC (RIA-LDPC) code combined with a reversed maximum-transition-run (MTR) code/error-correction codes (ECC). The system provides significant improvement in the error-rate floor and water-fall performance in short-block-length and high-rate codes.
机译:已经研究了结构化低密度奇偶校验(LDPC)代码作为磁记录通道的实用LDPC码。这些代码,例如阵列代码[1]和EIRA码[2],使能逻辑地构造矩阵。然而,它们的性能不足以用于符号间干扰(ISI)信道,尤其是当块长度变短并且代码率变高时。这是由于阵列代码的结构,由单循环移位矩阵构成。当信道中发生多个比特错误时,它们通过具有许多单循环移位的奇偶校验矩阵容易地连接,并且导致性能下降,就像矩阵有四个周期一样。在本文中,我们提出了一种使用随机交织阵列LDPC(RIA-LDPC)代码的系统与反转的最大转换运行(MTR)代码/误差码(ECC)组合。该系统在短块长度和高速码中的误差楼层和水落性能下提供了显着的改进。

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