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The SI/PI Modeling and Measurement of Memory System by Probing on Top of DRAM Package

机译:DRAM包顶部探测通过探测MES / PI建模和测量

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Continuous increase in the performance and speed of computer systems has led to more frequent field failures of memory systems. As a result, accurate measurement and modeling are becoming of utmost importance for memory vendors in order to guarantee the electrical reliability of their products. However, conventional on-chip measurement methodologies such as probing on the decoupling capacitor or a use of a test interposer between chip pads and measurement points. In this paper, we propose a novel method of measuring Signal Integrity and Power Integrity (SI/PI) performances of DRAM operation by directly probing on top of DRAM package. With this proposed test package, we prove the effectiveness of monitoring on-chip operation through simulation and measurement and hence, effectively enhance the level of SI/PI modeling and predictability of memory systems.
机译:计算机系统的性能和速度的连续增加导致了内存系统的更频繁的现场故障。 结果,准确的测量和建模对于存储器供应商来说至关重要,以保证其产品的电气可靠性。 然而,常规的片上测量方法,例如探测去耦电容器或芯片垫和测量点之间的测试插入器的使用。 在本文中,我们通过直接探测DRAM封装的顶部,提出了一种测量DRAM操作的信号完整性和功率完整性(SI / PI)性能的方法。 利用这件建议的测试包,我们通过模拟和测量来证明对片上操作的有效性,有效地提高了SI / PI建模和记忆系统可预测性的水平。

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