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The design of a DSC/DV dual role backend SoC

机译:DSC / DV双角色后端SoC的设计

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A DSC/DV dual role backend integrated controller chip is presented. It is an integrated SoC that includes hardwired image processing module, JPEG/MPEG-4 SP codec engine, 32-bit RISC engine, and other audio, video, and USB mixed signal interfaces. The key design breakthrough is to merge JPEG and MPEG-4 into a single codec module where DCT and quantization functions are shared between still and video coding process. It can achieve real-time MPEG-4 compression for VGA video at 30fps at only 96MHz speed.
机译:提供了DSC / DV双角色后端集成控制器芯片。它是一个集成的SOC,包括硬连线图像处理模块,JPEG / MPEG-4 SP编解码器引擎,32位RISC发动机和其他音频,视频和USB混合信号接口。关键设计突破是将JPEG和MPEG-4合并到单个编解码器模块中,其中在静止和视频编码过程之间共享DCT和量化功能。它可以以96MHz速度为30FPS实现VGA视频的实时MPEG-4压缩。

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