A hardware/software-concurrent JPEG2000 encoder

摘要

We implement a JPEG2000 encoder based on a hardware/software co-design methodology. We emphasize on the concurrent execution of hardware accelerator IPs and software running on the CPU. In an SOC platform, sequential hardware acceleration of DWT and EBCOT Tier-1 coding gives us 70% reduction in total execution time. The proposed concurrent scheme achieves additional 14% saving. We describe our experience in bringing up such a system.