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On statistical correlation based path selection for timing validation

机译:基于统计相关性的定时验证路径选择

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This paper presents a path selection methodology based on statistical timing models. Our contributions are twofold: (1) Unlike previous works in statistical path selection (Liou et al., 2002) where path set quality was analyzed using a pattern-independent static approach, this work analyzes the quality of patterns generated from the selected paths. (2) Unlike in previous works where the timing model is assumed to be 100% accurate, our path selection strategy aims to tolerate inaccurate timing models. To achieve pattern-based analysis, we develop an efficient timing simulator that can model both inter-die and intra-die process variations. To accomplish error tolerance in timing models, we introduce the concept of universal representative path set (UR-Set). We present experimental results to illustrate the usage of the statistical timing simulator and to demonstrate the superiority of our path selection methodology based on benchmark circuits.
机译:本文介绍了一种基于统计时序模型的路径选择方法。我们的贡献是双重的:(1)与之前的统计路径选择(Liou等人,2002)不同,使用模式无关的静态方法分析路径集质量,这项工作分析了所选路径生成的模式的质量。 (2)与以前的作品不同,定时模型被假定为100%准确,我们的路径选择策略旨在容忍不准确的时机模型。为了实现基于模式的分析,我们开发了一个高效的时序模拟器,可以模拟模拟芯片间和模芯内部过程变化。为了在定时模型中实现误差容忍度,我们介绍了通用代表路径集(UR-Set)的概念。我们提出了实验结果,以说明统计时序模拟器的使用,并基于基准电路来展示我们的路径选择方法的优越性。

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