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Performance Analysis Techniques in SOC Design

机译:SOC设计的性能分析技术

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Performance analysis is required in each stage of the SoC design cycle. Since the system level design is an iterative process, the analysis is applied to verify the performance constraints and to modify the system requirements accordingly before progressing to the next stages. Significant time and cost can be saved by checking and verifying the requirements in the early design stages rather than performing these later in the design cycle. Most of the performance analysis approaches target the communication part of the system that its representation varies between abstract channels, bus architecture and topology to protocol the is being used. To outline the performance analysis issues, the most popular techniques that may be used in every design stage and their importance have been clarified in this paper. A summary of the techniques and tools used has been provided. Additionally, a suggested set of metrics that can be used to evaluate these techniques and their definitions is also provided. The major performance analysis techniques have then been classified and compared according to these metrics or criterion Lastly, two examples of recent projects, PICO and POLIS which address the performance analysis issues as a main focus in building their design tools are presented at the end of the paper.
机译:SOC设计周期的每个阶段都需要性能分析。由于系统级设计是一个迭代过程,因此应用分析来验证性能约束,并在进展到下一个阶段之前相应地修改系统要求。通过检查和验证早期设计阶段的要求而不是在设计周期中执行这些,可以节省大量时间和成本。大多数性能分析方法接近系统的通信部分,即其表示在抽象通道,总线架构和拓扑之间正在使用协议。为了概述性能分析问题,本文阐明了每个设计阶段的最流行的技术及其重要性。已经提供了技术和工具的摘要。另外,还提供了一种可以用于评估这些技术的建议的测量标准和其定义。然后,主要的性能分析技术依赖于这些指标或标准进行分类,并将最近的项目,Pico和Polis的两个示例进行了解决,这些项目在结束时介绍了作为主要专注于构建其设计工具的主要专注的绩效分析问题。纸。

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