ELECTRICAL CHARACTERIZATION OF THIN OXIDE LAYERS BY IMPEDANCE SPECTROSCOPY USING SILICON/OXIDE/ELECTROLYTE (SOE) STRUCTURES

摘要

The determination of the capacitance/voltage characteristics in MOS devices is hindered by the high value of the tunneling leakage current, In this work, the difficulty was overcome by careful measurement of the impedance diagrams using a semiconductor/oxide/electrolyte (SOE) structure, under zero current flow. With this novel technique we obtained one RC equivalent circuit when the bias potential corresponded to the accumulation regime, whereas two well separated RC circuits appeared under the depletion regime. An interesting feature of the method is that both R and C components were derived from the data processing. Concerning the depletion layer, experimental results lead to values of the resistance term in the range of a few kΩ to a few MΩ .cm~2, while the capacitance value was a few 10~(-2) μF/cm~2. These results were consistent with a theoretical treatment of the bias voltage dependence of the charge distribution near the flatband potential. The leakage resistance term of the thermal oxide layer, a few nm thick, was found equal to several 10~8 Ω.cm~2. The local electric field is effective for the charge of the oxide capacitance, mostly under light radiation, and leads to an accurate method for ultra-thin insulators characterization excluding tunnel leakage current.