A Reference Design for a RapidIO End Point Using a Motorola 857T Processor and a Xilinx FPGA Based IP Core

摘要

The new high speed interconnect standards will dramatically change the way computer and communication systems are designed. Switch based systems will be the winners in new high performance designs, and RapidIO is positioned to be one of the more popular serial switch based standards. A hardware reference design is now available that uses a Xilinx FPGA to implement a RapidIO end point. The design also uses a Motorola 857T processor, running Linux, to transfer data across the RapidIO channel. The paper will describe the features and functionality of the design as well as the size, performance and cost of the final circuit board implementation. This Reference Design will be demonstrated in the Reference Design Village.