HiPAR-DSP 16, A new DSP for Onboard Real-Time SAR Systems

摘要

In this paper we present the HiPAR-DSP 16, a parallel and programmable processor architecture which is adapted to the demands of SAR image processing. To provide a high performance, the HiPAR-DSP 16 features an array of 16 parallel processing units. Each of these processing units can process up to 3 instructions per clock cycle. Efficient data exchange between the processing units can be done by a shared memory with concurrent access. The HiPAR-DSP 16 is able to perform a 4096 samples complex FFT in 154 μs and a complete ωk SAR processing algorithm on 4k range line with a PRF of more than 200 Hz in real-time. This shows the high capability of the HiPAR-DSP 16 for onboard real-time SAR systems.