首页> 外文会议>SPIE conference on Micro- and nano-optics for optical interconnection and information processing >Demonstrating optoelectronic interconnect in a FPGA based prototype system using flip chip mounted 2D arrays of optical components and 2D POF-ribbon arrays as optical pathways
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Demonstrating optoelectronic interconnect in a FPGA based prototype system using flip chip mounted 2D arrays of optical components and 2D POF-ribbon arrays as optical pathways

机译:使用倒装芯片安装的2D光学元件和2D POF - 带阵列的FPGA的原型系统中的光电互连作为光学通路

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Architectural studies have identified field-programmable gate arrays (FPGA) as a class of general-purpose very large scale integration components that could benefit from the introduction at the logic level of state-of-the-art massively parallel optical inter-chip interconnections. In this paper, we present small-scale optoelectronic multi-FPGA demonstrator in which three optoelectronic enhanced FPGAs are interconnected by 2D Plastic Optical Fiber (POF) ribbon arrays. The full-custom FPGA chips consisting of an 8 * 8 array of very simple programmable logic cells are equipped with two optical sources and two receivers per FPGA cell yielding a maximum of 256 optical links per chip. The optical links are designed for signaling rates of 80 to 100 Mbit/s (160 to 200 Mbaud using Manchester coded data) compatible with the maximum clock frequency of the, in 0.6μm CMOS implemented, FPGA chips. The results of parallel link experiments between such modules with both VCSELs and LEDs as sources will be shown. A large scale parallel bit error rate experiment at 90 Mbit/s/channel between two half-populated VCSEL-based FPGA modules with 112 of their 128 channels operational at bit error rates below 10~(-13) on all active channels (≈ 10 Gbit/s/chip) proves the feasibility of this approach. We first briefly discuss the general architecture and the realization of the optoelectronic FPGA demonstrator system. We then present measurement results on the available modules, followed by some conclusions on this work.
机译:架构研究已经确定了现场可编程门阵列(FPGA),作为一类通用的非常大规模集成组件,其可以从最先进的逻辑电平的逻辑电平的引入中受益,这些大规模的大规模平行的光学芯片间互连。在本文中,我们存在小型光电多FPGA示范器,其中三个光电增强FPGA通过2D塑料光纤(POF)带阵列互连。由8 * 8阵列的非常简单的可编程逻辑单元组成的全定制FPGA芯片配有两个光源,每个FPGA电池的两个接收器产生每芯片最多256个光学链路。光学链路设计用于80至100 Mbit / s(使用曼彻斯特编码数据的160至200 MBaud)的信令率与最大时钟频率相兼容,以0.6μmCMOS实现的FPGA芯片。将示出与源等vcsels和LED的这种模块之间的并行链路实验结果。在所有活动通道上以低于10〜(-13)的误码率为112的基于基于VCSEL的FPGA模块的90 Mbit / s /频道的大规模并行误码率实验。(≈10 Gbit / s /芯片)证明了这种方法的可行性。我们首先简要讨论了普通架构和光电FPGA示范系统的实现。然后我们对可用模块呈现测量结果,然后就此工作结论。

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