On Exploring Inter-iteration Parallelism Within Rate-balanced Multirate Multidimensional DSP Algorithms

摘要

Although the notion of the parallelism in multidimensional applications has existed for a long time, it is so far unknown what the bound (if any) of inter-iteration parallelism in multirate multidimensional DSP algorithms is, and whether the maximum inter-iteration parallelism can be achieved for arbitrary multirate data-flow algorithms. This paper explores the bound of inter-iteration parallelism within rate-balanced multirate multidimensional DSP algorithms and proves that this parallelism can always be achieved in hardware system given the availability of a large number of processors and the interconnections between them.