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Applications of the Interconnected Mesh Power System (Imps) Substrate Layer Reduction Topology

机译:互连网格电力系统(IMPS)基底层减少拓扑的应用

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摘要

A significant decrease in interconnection substrate production cost can be achieved by reduciing the number of substrate layers fro mthe conventional four or five (power, ground, X signal, Y signal, pad) to two or three. Besides reducing direct processing steps, yield also increases as defect producing operations are eliminated.
机译:通过将常规的四个或五(电源,接地,X信号,Y信号,焊盘)重复,可以通过减少衬底层的数量来实现互连衬底生产成本的显着降低。除了降低直接处理步骤之外,由于消除了缺陷产生操作,产量也会增加。

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