Multiple constant multiplication (MCM) circuits are often used in the digital signal processing (DSP), and a synthesis method to minimize computational complexity is required considering hardware cost. There is a possibility to design more optimum MCM circuit at a hardware level, because the existing methods consider only the number of carry propagate adders (CPA). In this research, we propose a hardware level design method of MCM circuit reducing not only computational complexity but also delay-time using the genetic algorithm (GA).
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