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Integrated serial dilution on a microchip for immunoassay sample treatment and flow injection analysis

机译:在微芯片上集成串联稀释,用于免疫测定样品处理和流动注射分析

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This paper presents the desing and performance of two serial diluters, a 32-fold diluter performing 1:1 dilution in 5 steps and a 1024-fold diluter with ten 1:1 mixing intersections. The simualtion package SPICE was used to model the diluter as a network of parallel and serial resistors for flow ratio estimates. Study of the 32-fold diluter showed the expected linear relationship between fluorescein signal and the inverse of overall dilution factor. The dilution factor at each intersection is evaluated to be 1.80+-0.02 and 1.89+-0.05 in the two devices compared to the nominal value of 2. These results show that itnegrated serial diluters are possible and the performance data provides foundation for future design of diluters within microchip systems.
机译:本文介绍了两个连续稀释剂的消退和性能,32倍稀释剂在5步骤中进行1:1稀释,1024倍的稀释剂,101:1混合交叉点。 Simualtion Package Spice用于将稀释器模拟为平行和串联电阻网络,用于流量比率估计。 32折稀释剂的研究显示荧光素信号与总稀释因子的倒数之间的预期线性关系。与标称值相比,每个交叉点的稀释因子在两个器件中评估为1.80±0.02和1.89±0.05.05.这些结果表明,这些结果表明,可能的串行稀释剂是可能的,并且性能数据为未来设计提供了基础微芯片系统内的薄荷。

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