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New planar self-aligned double-gate fully-depleted P-MOSFETs using epitaxial lateral overgrowth (ELO) and selectively grown source/drain (S/D)

机译:新的平面自对准双栅完全耗尽的P-MOSFET,使用外延横向过度过度流过(ELO)和选择性地生长源/漏极(S / D)

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摘要

Simulations have shown that self-aligned double-gate SOI MOSFETs are able to eliminate short channel effects and increase circuit performance for devices down to the L/spl sim/20-30 nm regime (Frank et al., 1992; Wong et al., 1994 and 1998; Fossum et al., 1998). Planar self-aligned fully-depleted double-gate structures are considered most promising (Wong et al., 1997). However, previous proposed fabrication processes have not shown experimental data with low subthreshold slopes or off-currents (Lee et al., 1999). This work presents, for the first time, successfully fabricated planar self-aligned double-gate P-MOSFETs with a good subthreshold swing (70 mV/dec) and low leakage current (I/sub off/0.3 pA//spl mu/m) using epitaxial lateral overgrowth (ELO). It also has a unique selective epitaxially grown source/drain (S/D). The measured hole mobility, 215 cm/sup 2//V-s at V/sub GS/-V/sub T/=-0.6 V, shows the good channel and interface quality obtained by using ELO.
机译:模拟已经表明,自对准的双栅极SOI MOSFET能够消除短信效应,并将电路性能提高到L / SPL SIM / 20-30 NM制度(Frank等,1992; Wong等人。 ,1994年和1998年; FOSSUM等人,1998年)。平面自对准全耗尽的双栅结构被认为是最有前途的(Wong等,1997)。然而,先前的提出的制造过程没有显示具有低亚阈值斜坡或偏离电流的实验数据(Lee等,1999)。这项工作首次呈现成功制造的平面自对准双栅极P-MOSFET,具有良好的亚阈值摆动(> 70 mV / DEC)和低漏电流(I / SUP OFF /> 0.3 PA // SPL MU / m)使用外延横向过度生长(ELO)。它还具有独特的选择性外延生长的源/漏极(S / D)。在v / sub gs / -v / sub t / = - 0.6V下测量的空穴迁移率215cm / sup 2 // V-s显示了通过使用ELO获得的良好通道和界面质量。

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