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A Design Methodology of Systolic Architectures Based on a Petri Net Extension. Application to a Stereovision Hardware/Software Processing Improvement

机译:基于Petri Net延伸的收缩架构设计方法。应用于立体电硬件/软件处理改进

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In this article, a new design methodology of systolic arrays based on Petri nets is presented. As regards to traditionnal methods, it takes advantages of using a model very useful in numerous industrial and research applications. After a short reminding on specific properties of basic systolic architectures, the different steps of the method are presented. Architectural PetriNets enable not only the modelling of a systolic architecture, but also the environment interfaces. An example is described, relative to the matrice multiplication which is used in an application of stereoscopic image processing for 3D reconstruction environment.
机译:在本文中,提出了基于Petri网的收缩阵列的新设计方法。关于传统方法,使用在众多工业和研究应用中非常有用的模型需要优势。在短暂提醒基本收缩架构的特定属性之后,提出了该方法的不同步骤。建筑Petrinets不仅可以实现收缩系统架构的建模,还可以实现环境界面。相对于基质乘法描述了一个示例,该矩阵乘法用于应用三维重建环境的立体图像处理。

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