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32-bit RISC Processor with Floating Point Unit for DSP Applications

机译:32位RISC处理器,具有用于DSP应用的浮点单元

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With the advent of technology, digital signal processing applications are flourishing prominently in space, medical and many commercial related areas. RISC processor is the heart of many high speed applications of embedded and digital signal processing. Floating point representation has prevalent ascendancy over fixed point numbers as it endeavors dynamic range of values. Hence in this paper a high speed MIPS based 32 bit RISC processor with single precision floating point unit for DSP applications is proposed. The inclination of the entire design is towards improving the performance of floating point arithmetic unit so as the performance of the entire RISC processor is ameliorated. The proposed processor is proficient of executing arithmetic, logical, floating point, data transfer, memory, shifting and rotating instructions. The complex multiplication are frequently used in the DSP applications and thus a special instruction for complex multiplication is incorporated. The multiplication engross most of the time, power and area of any operation, on that account the multiplier are reduced in number from four to two as compared to conventional complex multiplication method. The design is coded in Verilog HDL, simulated on Xilinx ISE 13.1 and synthesized on Spartan 6. Results indicates that the proposed design is optimized in speed as well as in area.
机译:随着技术的出现,数字信号处理应用在太空,医学和许多商业相关领域突出突出。 RISC处理器是嵌入式和数字信号处理的许多高速应用的核心。浮点表示在固定点数上具有普遍的升级,因为它努力的动态值范围。因此,在本文中,提出了一种基于32位RISC处理器的高速MIP,具有用于DSP应用的单精密浮点单元。整个设计的倾斜度是提高浮点算术单元的性能,从而改善整个RISC处理器的性能。所提出的处理器熟练精通执行算术,逻辑,浮点,数据传输,存储器,移位和旋转指令。复杂乘法经常用于DSP应用中,因此包含复杂乘法的特殊指令。与传统复杂乘法方法相比,该乘法器在该帐户上的大部分时间,功率和面积的大部分时间,功率和面积从四到两个的数量减小。该设计在Verilog HDL中编码,在Xilinx ISE 13.1上模拟并在Spartan 6上合成6.结果表明所提出的设计以速度以及区域进行优化。

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