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Reliability-Aware Multi-Vth Domain Digital Design Assessment

机译:可靠性感知多Vth域数字设计评估

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摘要

Resilient systems for future application as the Internet of Things (IoT), aerospace or automotive must satisfy demanding specifications over a 10-years lifespan. Thus, time-dependent degradation must be considered in early design stages. To ensure a realistic estimation of degradation impact a whole matrix decomposition algorithm is implemented in a 65nm CMOS technology with different multi threshold voltage standard cells, for a required low-power design. We present an assessment method based on stochastic mission profiles saving at least 10% area and power compared to common methods.
机译:作为未来应用的弹性系统,作为事物互联网(物联网),航空航天或汽车必须满足10年的寿命苛刻的规格。因此,必须在早期设计阶段考虑时间依赖的降解。为了确保劣化的逼真估计,在具有不同多阈值电压标准电池的65nm CMOS技术中实现了整个矩阵分解算法,用于所需的低功耗设计。与常用方法相比,我们提出了一种基于随机使命型材的评估方法,节省了至少10 %的区域和功率。

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