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The Implementation and Design Methodology of a Quad-core Version Godson-3 Microprocessor

机译:四核授权版ModoRocessor的实施与设计方法论

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Godson-3A is a quad-core version of Godson-3 series which is a 174 mm~2, 425 million transistors chip fabricated using 65 nm CMOS LP/GP process technology. It can be running at 1 GHz with less than 15W power consumption. Large scale, high frequency, low power and tight time schedule make great challenges in the chip design. To overcome these challenges, a design methodology based on ASIC combining with semi-custom (manual placement and routing using standard cells) and full-custom is adopted. This paper describes the implementation of Godson-3A microprocessor and the methodology used in the chip design.
机译:Godson-3A是龙芯-3系列的四核版本,是174 mm〜2,使用65nm CMOS LP / GP工艺技术制造的42500万晶体管芯片。它可以以1 GHz运行,低于15W的功耗。大规模,高频,低功耗和紧张时间表在芯片设计方面取得了巨大挑战。为了克服这些挑战,采用了一种基于ASIC与半自定义(手动放置和使用标准单元格的路由)和全部自定义组合的设计方法。本文介绍了龙芯-3A微处理器的实现和芯片设计中使用的方法。

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