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On improving the algorithmic robustness of a low-power FIR filter

机译:提高低功耗灭菌滤波器的算法鲁棒性

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Voltage scaling is a promising approach to reduce the power consumption in signal processing circuits. However aggressive voltage scaling can introduce errors in the output signal, thus degrading the algorithmic performance of the circuit. We consider the specific case of the finite impulse response (FIR) filter, and identify two different sources of errors occurring due to voltage scaling: (a) errors introduced because of increased delay along the logic path and (b) errors caused by failures in the memory due to process variations. We design a FIR filter by using a simple feedback based approach to reduce the memory errors and a linear predictor structure for correcting the logic errors. The proposed filter is more robust to both logic and memory errors caused by voltage scaling. The results show a considerable improvement in the output Signal to Noise ratio (at least around 10dB) for a probability of error (P_(err)) even as high as 0.5. We also utilize the proposed technique for an image filtering application and observe a considerable improvement in the visual quality of the output image along with an improvement of over 10dB in the Peak Signal to Noise ratio for P_(err) as high as 0.5.
机译:电压缩放是一种有希望的方法来降低信号处理电路中的功耗。然而,激进的电压缩放可以引入输出信号中的误差,从而降低电路的算法性能。我们考虑有限脉冲响应(FIR)过滤器的具体情况,并识别由于电压缩放引起的两个不同的错误源:(a)由于沿逻辑路径的延迟增加而引入的误差和由故障引起的错误由于过程变化而导致的内存。我们使用基于简单的反馈方法设计FIR滤波器来减少内存错误和用于校正逻辑错误的线性预测结构结构。所提出的滤波器对由电压缩放引起的逻辑和内存误差更加强大。结果表明,对于误差概率(P_(ERR))的噪声比(至少约为10dB)的输出信号相当大的改善,甚至高达0.5。我们还利用所提出的技术进行图像滤波应用,并观察输出图像的视觉质量的显着改善,以及在峰值信号中的超过10dB的改善,对于P_(ERR)高达0.5。

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