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High-Level Estimation of Execution Time and Energy Consumption for Fast Homogeneous MPSoCs Prototyping

机译:快速均匀MPSOCS原型执行时间和能耗的高级估计

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In order to fulfill the increasing performance requirements, complex embedded systems design makes use of many processors communicating through efficient infrastructures, performing Multiprocessor-Systems-on-Chip (MPSoCs). Issues related to execution time and energy consumption estimations become more relevant during the design stage of such systems, in order to verify their compliance with the specification. Different estimation techniques have been proposed, including analytical and simulation-based methods. Analytical methods are faster than simulation-based methods, but the system description is more complex, and sometimes this approach conducts to low precision results misleading future design steps. On the other hand, the more accurate results achieved with simulation-based method, using low-level descriptions, may delay the design making it unfeasible or at least affecting the time-to-market. In this context, improvements in simulation-based methods become pertinent. This paper presents a study, a design flow and a tool for high-level simulation-based estimation of execution time and energy consumption of homogeneous MPSoCs. The implemented tool, which employs the methodology presented in this paper, improved dramatically simulation times when compared to RTL simulations. The preliminary results show that, for some cases, the RTL simulation takes tens hours while the implemented tool gets close estimation results in just few seconds.
机译:为了满足日益增长的性能要求,复杂的嵌入式系统设计利用多处理器通过高效的基础设施,通信,执行多处理器的系统级芯片(MPSoCs)。与执行时间和能量消耗估计相关的问题在这种系统的设计阶段变得更加相关,以验证其遵守规范。已经提出了不同的估计技术,包括基于分析和基于模拟的方法。分析方法比基于仿真的方法更快,但系统描述更复杂,有时这种方法对低精度结果进行了误导性的设计步骤。另一方面,使用低级描述的基于仿真方法实现的更准确的结果可能会延迟设计,使得它不可行或至少影响上市时间。在这种情况下,基于模拟的方法的改进变得相关。本文提出了一种研究,一种设计流程和用于基于高电平模拟的高级模拟的工具的执行时间和能量消耗的均匀模拟。与RTL模拟相比,采用本文提出的方法的实施工具提高了显着的仿真时间。初步结果表明,在某些情况下,RTL模拟需要花费时间,而实现的工具在几秒钟内完成关闭估计结果。

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