Face detection is a widely studied topic in computer vision, and advances in algorithms, low cost processing, and CMOS imagers make it practical for embedded consumer applications. As with graphics, the best cost-performance ratio is achieved with dedicated hardware. The challenges of face detection in embedded environments include bandwidth constraints set by low cost memory and a need to find parallelism. Consumer applications need reliability, calling for a hard real-time approach to guarantee that deadlines are met. We present a face detection system for automatic exposure control in a handheld digital camera or camera phone. Contributions include a complexity control scheme to meet hard real-time deadlines, a hardware pipeline design for Haar-like feature calculation, and a system design exploiting several levels of parallelism. The proposed architecture is verified by synthesis to Altera's low cost Cyclone II FPGA. Simulation results show the algorithm can achieve about 80% detection rate for group portrait pictures.
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机译:面部检测是计算机愿景中的广泛研究主题,算法的进步,低成本处理和CMOS成像仪对嵌入式消费者应用程序进行了实用。与图形一样,使用专用硬件实现最佳成本效率。嵌入式环境中的面部检测的挑战包括由低成本存储器设置的带宽约束,并且需要找到并行性。消费者应用需要可靠性,调用硬实时方法来保证满足截止日期。我们在手持数码相机或相机电话中介绍了一种用于自动曝光控制的脸部检测系统。贡献包括复杂性控制方案,以满足困难的实时截止日期,是哈尔样功能计算的硬件管道设计,以及利用几个水平的并行性的系统设计。通过合成给Altera的低成本Cyclone II FPGA来验证所提出的架构。仿真结果表明,该算法可以达到组肖像图像的约80%检测率。
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