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A global router on GPU architecture

机译:GPU架构上的全球路由器

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摘要

In the modern VLSI design flow, global router is often utilized to provide fast and accurate congestion analysis for upstream processes to improve the design routability. Global routing parallelization is a good candidate to speedup its runtime performance while delivering very competitive solution quality. In this paper, we first study the cause of insufficient exploitable concurrency of the existing net level concurrency model, which has become a major bottleneck for parallelizing the emerging design problems. Then, we mitigate this limitation with a novel fine grain parallel model, with which a GPU based multi-agent global router is designed. Our experimental results indicate that the parallel model can effectively support the GPU based global router, and deliver stable solutions. The runtime comparison with NCTUgr2 has shown that upto 3.9× speedup is achieved by the GPU based router.
机译:在现代VLSI设计流程中,全局路由器通常用于为上游流程提供快速准确的拥塞分析,以提高设计可排放性。全局路由并行化是一个很好的候选者,可以在提供非常竞争力的解决方案质量的同时加速其运行时性能。在本文中,我们首先研究了现有净水平并发模型的可利用并发性不足的原因,这已成为并行化新兴设计问题的主要瓶颈。然后,我们利用新型精细晶粒并行模型缓解此限制,设计了基于GPU的多助理全局路由器。我们的实验结果表明,并行模型可以有效地支持基于GPU的全球路由器,并提供稳定的解决方案。与NCTUGR2的运行时比较显示,基于GPU的路由器实现了高达3.9倍的加速。

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