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Contention Resolution by means of Packet Envelope Detection Circuit with a Slow Saturable Absorber-based Vertical Cavity Semiconductor Gate

机译:争用分辨率通过分组包络检测电路,具有缓慢可饱和的吸收体的垂直腔半导体栅极

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We have successfully demonstrated a simple and cost effective scheme for all-optical packet contention resolution by means of a PEDC comprised of a saturable absorber-based VCSG and a SOA. An extinction ratio of 15 dB for the PEDC output signal was measured with 1.5 ns using time and 2.5 ns falling time. Major benefits of our solution are polarization independence, transparency to the input packet wavelength, compactness, reduced number of active devices and low power operation
机译:我们已经成功地通过包括可饱和的吸收体的VCSG和SOA组成的PEDC来证明了一种简单且具有成本效益的方案,用于所有包括饱和吸收体的VCSG和SOA。 使用时间和2.5 ns下降时间为1.5 ns测量PECC输出信号的15dB的消光比。 我们解决方案的主要优点是偏振独立性,输入分组波长,紧凑性,有源器件数量的透明度和低功耗操作

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