Design of FPGA-based Hardware Accelerators for On-line Fingerprint Matcher Systems

摘要

Nowadays fingerprints are the most widely used biometric characteristics in automatic personal authentication or identification systems. Most human recognition systems use those fingertip discontinuities called minutiae and mainly based on the ridge endings and the ridge bifurcations of the skin to perform fingerprint matching. A fingerprint pattern is thus defined by the spatial distribution of its distinctive traits. Matching two fingerprints in minutiae-based representations becomes a point pattern matching, and it consists of finding the alignment and correspondences between pairs of minutia points in both sets. Several algorithms have been proposed in the last decades to efficiently match two fingerprint minutiae sets. This paper describes the design of FPGA-based accelerators responsible for performing those computationally expensive tasks needed in the fingerprint matching process. The acceleration results obtained when partitioning the application in hardware and software tasks permits to make the conventional purely software-oriented and off-line matching algorithms suitable for on-line applications.