EFFECTS OF LOW TEMPERSTURE NH{sub}3 TREATMENT ON HfO{sub}2/SiO{sub}2 STACK GATE DIELECTRICS FABRICATED BY MOCVD SYSTEM

摘要

The effects of post-deposition low temperature (～400°C) NH{sub}3 (LTN) treatment on the characteristics of HfO{sub}2/SiO{sub}2 gate stack with TiN gate electrode were studied in this work. HfO{sub}2 films were deposited using AIXTRON Tricent MOCVD system. Subsequently, the LTN treatment was implemented prior to post-deposition annealing (PDA) in order to avoid the growth of additional interfacial layer frequently seen as the high temperature nitridation technique is used. The effective electrical oxide thickness (EOT) for the annealed devices at 700°C with and without LTN was estimated to be about 2.2 nm and 2.3 nm without considering Quantum effect. It was found that the low temperature NH{sub}3 treatment can not only effectively improve the characteristics of HfO{sub}2/SiO{sub}2 stack gate dielectrics, such as C-V characteristics, frequency dispersion, trap generation rate, and dielectric breakdown voltage even at higher PDA temperature (～700°C), but also reduce the resultant EOT.