A 12-BIT 80MS/S A/D/A INTERFACE FOR POWER-LINE APPLICATIONS IN 0.13μM DIGITAL CMOS TECHNOLOGY

摘要

This paper presents an Analog-to-Digital-to-Analog interface, consisting of a pipeline Analog-to-Digital converter and a segmented current steering Digital-to-Analog converter. The interface has been implemented in a 0.13μm digital CMOS technology and is integrated in a system for high-performance broadband Power-Line Communications. In both cases, specifications are 12-b resolution and Multi-Tone Power Ratio over 56dB within a 40-MHz signal bandwidth.