Digital Word-parallel associative-memory architecture capable of Manhattan-distance-based vector quantization is reported, which applies frequency dividers and clock counting to realize nearest Manhattan-distance (MD) search. Experimental verification was done with a 65 nm CMOS design implementing 128 reference vectors, each having 16 components and 16 bit per component. For the fabricated test chips 926 ps minimum search time and 2.13 mW power dissipation are measured at 120MHz and Vdd = 1.2V. At lower supply voltage of Vdd = 0.9V and lower frequency of 20MHz the power-dissipation reduces to 130 μW. In comparison to previous digital architecture a factor 100 smaller power delay product (estimated factor 16 when scaled to 65 nm CMOS) is achieved.
展开▼
