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A Customizable Hardware Implementation of the Discrete Wavelet Transform for Embedded Applications based on the JPEG2000 Standard

机译:基于JPEG2000标准的嵌入式应用程序的离散小波变换的可自定义硬件实现

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Embedded image processing systems have to face heavier and heavier constraints in order to cope with the growing complexity of the algorithms and the increasing flexibility required by applications, while fulfilling more and more demanding implementation constraints. With a variety of target application profiles that include digital photography and remote sensing, the JPEG2000 standard is a typical example where complex and scalable techniques have to be implemented into highly integrated platforms. While the electronic system design community has pushed design-by-reuse as a key to manage complexity, providing a reusable hardware architecture for JPEG2000 while preserving the high flexibility required by the wide application space is a major challenge. In this paper, we propose to address this issue by relying on a new class of synthesis tools: high-level synthesis (HLS) tools. HLS allows to specify hardware at a high abstraction level ― where a variety of functional and architectural properties can be made customizable ― and provides an automatic, constraint-driven architectural refinement flow that allows to generate a detailed register-transfer-level architecture from a behavioral (algorithmic-like) description of a component's behavior. Using a commercial HLS tool, we were able to generate a variety of JPEG2000-compliant discrete wavelet transform architectures, with varying hardware complexity and computation speed, from a single behavioral-level VHDL specification.
机译:嵌入式图像处理系统必须面对更重和更重的约束,以应对算法的增长复杂性以及应用程序所需的越来越大的灵活性,同时满足越来越苛刻的实施约束。通过包括数码摄影和遥感的各种目标应用程序配置文件,JPEG2000标准是一个典型的示例,其中复杂和可扩展技术必须实现为高度集成的平台。虽然电子系统设计社区推用了设计逐个重用作为管理复杂性的关键,但为JPEG2000提供可重复使用的硬件架构,同时保留广泛应用空间所需的高灵活性是一个主要挑战。在本文中,我们建议通过依靠新的综合工具来解决这个问题:高级合成(HLS)工具。 HLS允许在高抽象级别指定硬件 - 其中可以定制各种功能和架构属性 - 并提供自动的约束驱动的架构细化流,允许从行为生成详细的寄存器传输级架构(算法类似)组件的行为描述。使用商用HLS工具,我们能够从单个行为级VHDL规范生成各种符合JPEG2000标准的离散小波变换架构,包括不同的硬件复杂性和计算速度。

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