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A Customizable Hardware Implementation of the Discrete Wavelet Transform for Embedded Applications based on the JPEG2000 Standard

机译:基于JPEG2000标准的嵌入式应用的离散小波变换的可定制硬件实现

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Embedded image processing systems have to face heavier and heavier constraints in order to cope with the growing complexity of the algorithms and the increasing flexibility required by applications, while fulfilling more and more demanding implementation constraints. With a variety of target application profiles that include digital photography and remote sensing, the JPEG2000 standard is a typical example where complex and scalable techniques have to be implemented into highly integrated platforms. While the electronic system design community has pushed design-by-reuse as a key to manage complexity, providing a reusable hardware architecture for JPEG2000 while preserving the high flexibility required by the wide application space is a major challenge. In this paper, we propose to address this issue by relying on a new class of synthesis tools: high-level synthesis (HLS) tools. HLS allows to specify hardware at a high abstraction level ― where a variety of functional and architectural properties can be made customizable ― and provides an automatic, constraint-driven architectural refinement flow that allows to generate a detailed register-transfer-level architecture from a behavioral (algorithmic-like) description of a component's behavior. Using a commercial HLS tool, we were able to generate a variety of JPEG2000-compliant discrete wavelet transform architectures, with varying hardware complexity and computation speed, from a single behavioral-level VHDL specification.
机译:嵌入式图像处理系统必须面对越来越重的约束,以应对算法日益增长的复杂性和应用程序所需的日益增长的灵活性,同时还要满足越来越苛刻的实现约束。 JPEG2000标准具有包括数字摄影和遥感在内的多种目标应用程序配置文件,是典型示例,其中必须将复杂和可扩展的技术实施到高度集成的平台中。尽管电子系统设计社区已将“按重用设计”作为管理复杂性的关键,但要为JPEG2000提供可重用的硬件体系结构,同时又要保留广泛的应用空间所要求的高度灵活性是一个重大挑战。在本文中,我们建议通过依赖一类新的综合工具来解决此问题:高级综合(HLS)工具。 HLS允许在较高的抽象级别上指定硬件-可以自定义各种功能和体系结构属性-并且提供了自动的,约束驱动的体系结构优化流程,该流程允许从行为生成详细的寄存器传输级体系结构(类似于算法的)组件行为的描述。使用商业的HLS工具,我们能够从单个行为级VHDL规范中生成各种具有JPEG2000兼容特性的离散小波变换架构,并且具有不同的硬件复杂性和计算速度。

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