Standardization of Compact Device Modeling in High Level Description Language

摘要

This paper proposes a methodology based on hardware description languages (HDL) to efficiently develop compact device models. After an introduction to compact device modeling we describe Verilog-AMS, a popular HDL. Then we show how Verilog-AMS syntax can be used to fully encode compact device models. We conclude with some results obtained by following the presented methodology and by using a model builder called ADMS.