In this paper, we propose an efficient bit loading algorithm for IEEE 802.11a wireless LAN systems. A conventional bit loading algorithm uses the SNR value of each subcarrier. However, it is very difficult to estimate the exact SNR value in wireless LAN systems due to the randomness of AWGN. Therefore, the proposed algorithm uses the channel frequency response instead of the SNR value of each subcarrier. From 54Mbps simulation, we can obtain the performance gain of 6.5dB at PER of 10{sup}(-2) with the proposed algorithm, whereas the conventional one obtains that of 5dB at the same conditions. Also, it is observed that the wireless LAN system with the proposed algorithm supports up to 63Mbps. After the logic synthesis using 0.35μm CMOS technology, the logic gate count for the processor with the proposed algorithm can be reduced by 34% in comparison with the conventional one.
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