A novel /spl Sigma//spl Delta/ modulator design applied to dual GSM/WCDMA receiver

摘要

A novel /spl Sigma//spl Delta/ modulator is presented with lower power consumption and higher Signal to Noise Ratio (SNR) than the conventional modulator for a given order. The novel modulator is applied in analog-to-digital converters of RF receivers. The same modulator architecture is used for GSM and WCDMA receivers differing only in the Oversampling Ratio (OSR). The modulator was designed using switched capacitor circuits and could be implemented in VLSI.