Automated Design Methodology for CMOS Analog Circuit Blocks in Complex Systems

摘要

A design methodology for analog circuit blocks is proposed which combines circuit knowledge for predefined topologies with CAD simulation tools. In a more complex analog or mixed-signal system design metrics for each block are first established during an exploration phase based on analytical descriptions. In the proposed approach behavioral equations for each circuit are derived using a basic EKV model. Selection of a performance point in the design space results in a first sizing of the transistors in each block. This is followed by SPICE verification using foundry-provided process data. Additional numerical optimization is applied in a second iteration for closing the gap with the requirement specification.